By Mikhail Baklanov, Paul S. Ho, Ehrenfried Zschech
Discovering new fabrics for copper/low-k interconnects is important to the ongoing improvement of machine chips. whereas copper/low-k interconnects have served good, bearing in mind the production of extremely huge Scale Integration (ULSI) units which mix over 1000000000 transistors onto a unmarried chip, the elevated resistance and RC-delay on the smaller scale has develop into a significant component affecting chip functionality.
Advanced Interconnects for ULSI Technology is devoted to the fabrics and techniques that may be compatible replacements. It covers a vast variety of themes, from actual rules to layout, fabrication, characterization, and alertness of latest fabrics for nano-interconnects, and discusses:
- Interconnect services, characterisations, electric houses and wiring standards
- Low-k fabrics: basics, advances and mechanical houses
- Conductive layers and obstacles
- Integration and reliability together with mechanical reliability, electromigration and electric breakdown
- New techniques together with 3D, optical, instant interchip, and carbon-based interconnects
Intended for postgraduate scholars and researchers, in academia and undefined, this e-book presents a severe assessment of the allowing know-how on the middle of the long run improvement of laptop chips.
Chapter 1 Low?k fabrics: contemporary Advances (pages 1–33): Geraud Dubois and Willi Volksen
Chapter 2 Ultra?Low?k by way of CVD: Deposition and Curing (pages 35–77): Vincent Jousseaume, Aziz Zenasni, Olivier Gourhant, Laurent Favennec and Mikhail R. Baklanov
Chapter three Plasma Processing of Low?k Dielectrics (pages 79–128): Hualiang Shi, Denis Shamiryan, Jean?Francois de Marneffe, Huai Huang, Paul S. Ho and Mikhail R. Baklanov
Chapter four rainy fresh purposes in Porous Low?k Patterning tactics (pages 129–171): Quoc Toan Le, man Vereecke, Herbert Struyf, Els Kesters and Mikhail R. Baklanov
Chapter five Copper Electroplating for On?Chip Metallization (pages 173–191): Valery M. Dubin
Chapter 6 Diffusion boundaries (pages 193–234): Michael Hecker and Rene Hubner
Chapter 7 method Integration of Interconnects (pages 235–265): Sridhar Balakrishnan, Ruth mind and Larry Zhao
Chapter eight Chemical Mechanical Planarization for Cu–Low?k Integration (pages 267–289): Gautam Banerjee
Chapter nine Scaling and Microstructure results on Electromigration Reliability for Cu Interconnects (pages 291–337): Chao?Kun Hu, Rene Hubner, Lijuan Zhang, Meike Hauschildt and Paul S. Ho
Chapter 10 Mechanical Reliability of Low?k Dielectrics (pages 339–367): Kris Vanstreels, Han Li and Joost J. Vlassak
Chapter eleven electric Breakdown in complicated Interconnect Dielectrics (pages 369–434): Ennis T. Ogawa and Oliver Aubel
Chapter 12 3D Interconnect know-how (pages 435–490): John U. Knickerbocker, Lay Wai Kong, Sven Niese, Alain Diebold and Ehrenfried Zschech
Chapter thirteen Carbon Nanotubes for Interconnects (pages 491–502): Mizuhisa Nihei, Motonobu Sato, Akio Kawabata, Shintaro Sato and Yuji Awano
Chapter 14 Optical Interconnects (pages 503–542): Wim Bogaerts
Chapter 15 instant Interchip Interconnects (pages 543–563): Takamaro Kikkawa
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Additional info for Advanced Interconnects for ULSI Technology
2 Hybrid Organic–Inorganic: Oxycarbosilanes The observation that incorporation of organic moieties into sol-gel glasses can reduce their brittleness [156–160] has drawn the attention of the semiconductor industry. 6 Carbon-bridged alkoxysilane precursors used in the preparation of spin-on porous low-k films (R = OMe, OEt) hybrid materials should be low cost, commercially available or readily prepared on a large scale. 6). These hybrid organic– inorganic materials are known in the literature under different names: bridged polysilsesquioxanes [161, 162], oxycarbosilanes [1, 7, 163–165] and carbosiloxanes .
Prevention or repair of plasma-induced processing damage. 3. Use of multilayer structures comprised of an organic dielectric and an organosilicate. 1 Post-deposition Treatments The deposition of organosilicate-based dielectric materials, as practiced in the semiconductor industry, typically involves a thermally activated process either during or immediately following the deposition step. The thermal portion of this process step is dictated by the need to decompose the thermally labile pore generator (porogen) and to ensure optimum network formation.
While most of these problems were mitigated by material reengineering and chip redesign, solutions occurred too late, relegating the organic polymers to possible hybrid build applications . For the new low-k materials, it was expected that their electrical and mechanical properties would be comparable to those of silicon dioxide [9, 10], the insulating material of reference for the quite conservative semiconductor industry. Chemical modification of the silicon network, first by introduction of fluorine and eventually by the addition of carbon, was then adopted as the lower risk path to introducing low-k materials in the back-end-of-the-line (BEOL) .
Advanced Interconnects for ULSI Technology by Mikhail Baklanov, Paul S. Ho, Ehrenfried Zschech